LA76832N

Ordering number : ENA0069 LA76832N Monolithic Linear IC I2C Bus Control IC Overview The LA76832N is I2C bus controller ICs that support the NTSC and aim for rationalization of color TV set design, improved manufacturability, and lower total costs. Functions • I2C Bus Control VIF/SIF/Y/C/Deflection Implemented in a Single Chip Specitications Maximum Ratings at Ta = 25°C Parameter Symbol Conditions Maximum supply voltage V8 max V31 max V43 max Maximum supply current I18 max I25 max Allowable power dissipation Operating temperature Storage temperature Pd max Topr Tstg Ta≤65°C * 7.07.07.025351.6-10 to +65-55 to +150V V V mA mA W °C °C Ratings Unit *Provided with a glass epoxy board (114.3×76.1×1.6mm) Operating Conditions at Ta = 25°C Parameter Symbol Conditions Recommended supply voltage V8 V31 V43 Recommended supply current I18 I25 Operating supply voltage range V8 op V31 op V43 op Operating supply current range I25 op I18 op 5.05.05.019274.7 to 5.34.7 to 5.34.7 to 5.324 to 3017 to 21V V V mA mA V V V mA mA Ratings Unit AnyandallSANYOSemiconductorproductsdescribedorcontainedhereindonothavespecificationsthatcanhandleapplicationsthatrequireextremelyhighlevelsofreliability,suchaslife-supportsystems,aircraft'scontrolsystems,orotherapplicationswhosefailurecanbereasonablyexpectedtoresultinseriousphysicaland/ormaterialdamage.ConsultwithyourSANYOSemiconductorrepresentativenearestyoubeforeusinganySANYOSemiconductorproductsdescribedorcontainedhereininsuchapplications.SANYOSemiconductorassumesnoresponsibilityforequipmentfailuresthatresultfromusingproductsatvaluesthatexceed,evenmomentarily,ratedvalues(suchasmaximumratings,operatingconditionranges,orotherparameters)listedinproductsspecificationsofanyandallSANYOSemiconductorproductsdescribedorcontainedherein. 92706 / O3005 MS PC B8-5799 No.0069-1/39 LA76832N Electrical Characteristics at Ta = 25°C, VCCL = V8 = V31 = V43 = 5.0V, ICC = I18 = 19mA, ICC = I25 = 27mA Ratings Parameter Symbol Conditions Unit min typ max [Circuit voltage, current] IF supply current RGB supply current Horizontal supply voltage CCD supply current Video supply current [CCD block] Voltage gain Voltage gain B Difference of voltage gain Delay time [OSD block] OSD Fast SW threshold Red RGB output level Green RGB output level Blue RGB output level Analog OSD R output level Gain match FSTH ROSDH GOSDH BOSDH RRGB GRGB BRGB Linearity LRRGB Analog OSD G output level Gain match Linearity LGRGB Analog OSD B output level Gain Match Linearity LBRGB [RGB output (cutoff drive) block] Brightness control (Normal) BRT63 Hi brightness (max) Low brightness (Min) Cutoff control (min) (Bias control) (max) BRT127 BRT0 1.9 2.2 2.5V 40 40 IRE IRE V V mV/Bit mV/Bit Vp-p Vp-p dB dB 2.3 2.5 2.7120 165 20070 120 14085 120 1551.12 1.4 1.6845 50 600.8 1.0 1.245 50 600.8 1.0 1.245 50 60V IRE IRE IRE Ratio % Ratio % Ratio % GV_R GV_B DGV Td -2 0 +2-2 0 +20 0.1 0.3 63.8 dB dB dB µs I8 V18 V25 I31 I43 V8 = 5V V3 = 2.5V I18 = 19mA I25 = 27mA I31 = 5V I43 = 5V 55.0 65.0 8.0 5.0 5.6 150 75.0mA V V mA mA Vbias0 Vbias255 Vsbiassns RBout127 Gout15 RBout0 Gout0 VRFH VRFL RFAGC0 RFAGC63 VOn VOtip VO S/N IC-S CW = 80dBµ, DAC = 0 CW = 80dBµ, DAC = 63 DAC = 0 DAC = 63 1.6 2.0 2.42.8 3.2 3.6 4 8 2.7 1.8 7 9 111.5 3.5 5.5Resolution Vbiassns Sub-bias control Resolution RB Drive adjustment Maximum output G Drive adjustment Maximum output RB Output attenuation G Output attenuation [VIF block] Maximum RFAGC voltage Minimum RFAGC voltage RF AGC Delay Pt (@DAC = 0) RF AGC Delay Pt (@DAC = 63) Input sensitivity No-signal video output voltage Sync signal tip level Video output amplitude Video S/N C-S beat level Differential gain Differential phase Maximum AFT output voltage Minimum AFT output voltage AFT detection sensitivity 8.5 0 85 9 0.3 750.7Vdc Vdc dBµ dBµ Vi Output -3dB No signal 46dBµ 3.3 3.7 4.1Vdc CW = 80dBµ 1.1 1.4 1.7Vdc 80dBµ, AM = 78%, fm = 15kHz 1.9 2.0 2.1Vp-p CW = 80dBµ 45 dB V3.58MHz/V920MHz 30 5.0 2.0 10.010.0dB % deg Vdc Vdc mV/kHzDG 80dBµ, 87.5% Video MOD DP 80dBµ, 87.5% Video MOD VAFTH VAFTL VAFTS CW = 80dBµ, frequency variations 4.3 4.7 5.0CW = 80dBµ, frequency variations 0.0 0.2 0.7CW = 80dBµ, frequency variations 12.0 20.0 28.0Continued on next page. No.0069-2/39 LA76832N Continued from preceding page. Ratings Parameter Symbol Conditions Unit min typ max APC pull-in range (U) APC pull-in range (L) [SIF block] FM detection output voltage FM limiting sensitivity FM detection output f characteristics FM detection output distortion AM rejection ratio SIF S/N de-emph time constant [AUDIO block] Maximum gain Variable range Frequency characteristics AGMAX 1kHz ARANGE AF 20kHz 1kHz, 500mVrms, Vol : MAX -2.5 0.0 +2.560 65 -3.0 0.0 +3.070 0.5dB dB dB dB % dB dB SOADJ SLS Output -3dB SF fm = 100kHz SAMR AM = 30% 500 61-0.5 6.0 9.0mVrmsdBµ dB fPU fPL 1.0 MHz 1.0 MHz STHD FM = ±25kHz 1.0% 40 dB dB dB SSN DIN. Andio SNTC 50 3.0 Mute AMUTE 20kHz Distortion ATHD S/N ASN DIN. Audio Crosstalk ACT 1kHz [Video SW block] Video signal input 1DC voltage Video signal input 1AC voltage Video signal input 2DC voltage Video signal input 2AC voltage SVO terminal DC voltage SVO terminal AC voltage [Filter block] Chroma trap amount NTSC Chroma trap amount PAL C-BPF1A (3.93MHz) C-BPF1B (4.73/4.13MHz) C-BPF1C (4.93/3.93MHz) C-BPF2A (3.93MHz) C-BPF2B (4.73/4.13MHz) C-BPF2C (4.93/3.93MHz) Y-DL TIME1 6MHz Trap Y-DL TIME2 PAL Y-DL TIME3 NTSC [Video block] Video overall gain (Contrast max) Contrast adjustment characteristics (Normal/max) Contrast adjustment characteristics (Min/max) Sharpness variability range (Normal) Sharp31 (max) (min) Sharp63 Sharp0 FILTER SYS = 0000 FILTER SYS = 0000 FILTER SYS = 0000 CONT0 CONT127 CtrapN CtrapP CBPF1A Reference : 4.43MHz FILTER SYS = 0010 CBPF1B Reference : 4.13MHz FILTER SYS = 0010 CBPF1C Reference : 3.93MHz FILTER SYS = 0010 CBPF2A Reference : 4.43MHz FILTER SYS = 0011 CBPF2B Reference : 4.13MHz FILTER SYS = 0011 CBPF2C Reference : 3.93MHz FILTER SYS = 0011 TdY1 TdY2 TdY3 FILTER SYS = 0100 FILTER SYS = 0010 FILTER SYS = 0001 VIN1DC VIN1AC VIN2DC VIN2AC SVODC SVOAC 65 70 70 2.2 2.5 2.8 1 2.2 2.5 2.8 1 1.7 2.0 2.31.7 2.0 2.3V Vp-p V Vp-p V Vp-p -36.0 -26.0 -22.0-36.0 -26.0 -22.0-6.0 -3.0 0.0-0.5 1.5 3.56.0 4.0 1.0-4.0 -1.0 0.0-2.0 0.0 2.0-2.5 0.0 2.5300.0 490.0 530.0 350.0 540.0 580.0 400.0590.0630.0dB dB dB dB dB dB dB dB ns ns ns 9.0 11.0 13.0dB dB dB dB dB dB CONT63 -7.5 -6.0 -4.5-15.0 -12.0 -9.06.0 9.0 -4.0 9.0 12.0 -1.0 12.015.02.0Continued on next page. No.0069-3/39 LA76832N Continued from preceding page. Ratings Parameter Symbol Conditions Unit min typ max Sharpness variability range (trap 1 mid) (trap 1 max) (trap 1 min) Sharpness variability range (trap 2 mid) (trap 2 max) (trap 2 min) Sharpness variability range (trap 3 mid) (trap 3 max) (trap 3 min) Black stretch gain max Black stretch gain mid Black stretch gain min Sharp32T1 Sharp63T1 Sharp0T1 Sharp32T1 Sharp63T1 Sharp0T1 Sharp32T1 Sharp63T1 Sharp0T1 BKSTmax BKSTmid BKSTmin F = 2.2MHz, FILTER SYS = 000 F = 2.2MHz, FILTER SYS = 000 F = 2.2MHz, FILTER SYS = 000 F = 2.7MHz, FILTER SYS = 010 F = 2.7MHz, FILTER SYS = 010 F = 2.7MHz, FILTER SYS = 010 F = 3.0MHz, FILTER SYS = 100 F = 3.0MHz, FILTER SYS = 100 F = 3.0MHz, FILTER SYS = 100 Gain = 10, Start = 01 Gain = 01, Start = 01 Gain = 00, Start = 01 Bain = 01, Start = 10 Bain = 01, Start = 01 Bain = 01, Start = 00 DCREST = 00 DCREST = 01 DCREST = 10 DCREST = 11 5.0 8.5 -6.5 5.0 8.5 -6.5 5.0 8.5 -6.5 23.0 16.0 9.0 -5.0 -5.0 -5.0 95.0 102.0 107.0 113.0 8.0 11.5 -3.5 8.0 11.5 -3.5 8.0 11.5 -3.5 28.0 21.0 14.0 0.0 0.0 0.0 100.0 107.0 112.0 118.0 11.013.5-0.511.013.5-0.511.013.5-0.533.026.019.0+5.0+5.0+5.0105.0112.0117.0123.0dB dB dB dB dB dB dB dB dB IRE IRE IRE IRE IRE IRE % % % % V dB dB dB IRE IRE % % % Black stretch start point max (60IRE ∆V) BKSTTHmax Black stretch start point mid (50IRE ∆V) BKSTTHmid Black stretch start point min (40IRE ∆V) BKSTTHmin DC transmission amount 1 DC transmission amount 2 DC transmission amount 3 DC transmission amount 4 Horizontal/vertical blanking output level Video frequency characteristics 1 6MHz Trap Video frequency characteristics 2 PAL Video frequency characteristics 3 NTSC White peak limiter effective point 1 White peak limiter effective point 2 Y gamma effective point 1 Y gamma effective point 2 Y gamma effective point 3 Pre-shoot adjust 1 Pre-shoot adjust 2 [Chroma block] : PAL/NTSC common B-Y/Y amplitude ratio Color control characteristics 1 Color control characteristics 2 Color control sensitivity Residual higher harmonic level B Residual higher harmonic level R Residual higher harmonic level G [Chroma block] : PAL ACC amplitude characteristics 1 ACC amplitude characteristics 2 Demodulation output ratio R-Y/B-Y : PAL Demodulation output ratio G-Y/B-Y : PAL ACCM1_P RB_P GB_P BW2 BW3 WPL1 WPL2 YG1 YG2 YG3 PreShoot1 PreShoot2 ClampG1 ClampG2 ClampG3 ClampG4 RGBBLK BW1 3.4MHz/100kHz, Filter sys = 0100 1.8MHz/100kHz, Filter sys = 0010 1.4MHz/100kHz, Filter sys = 0000 APL = 10% WPL = 01 APL = 100% WPL = 01 YGAMMA = 01 YGAMMA = 10 YGAMMA = 11 Pre-shoot adj. = 00 Pre-shoot adj. = 11 0.1 0.4 0.7-6.0 -6.0 -6.0 90.0 150.0 89.0 81.0 76.0 0.92 1.08 -3.0 -3.0 -3.0 95.0 160.0 93.0 85.0 80.0 0.97 1.13 0.00.00.0100.0170.097.089.084.01.021.18CLRBY CLRMN Color MAX/CEN CLRMM Color MAX/MIN CLRSE E_CAR_B E_CAR_R E_CAR_G 75 100 1501.6 2.0 2.433 40 501 2 4 300300300% times dB %/bit mVp-p mVp-p mVp-p Input : +6dB/0dB 0dB = 40IRE 0.8 1.0 1.2times times times times ACCM2_P Input : -20dB/0dB R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center, R-Y = no-signal 0.7 1.0 1.10.50 0.56 0.67-0.21 -0.19 -0.17Demodulation output ratio G-Y/R-Y : PAL GR_P R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center, B-Y = no-signal -0.56 -0.51 -0.46times Demodulation angle R-Y/B-Y : PAL Killer operating point ANGRB_P R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center KILL_P 0dB = 40IRE 85 90 95-39 -33 -26deg dB Continued on next page. No.0069-4/39 LA76832N Continued from preceding page. Ratings Parameter Symbol Conditions Unit min typ max APC pull-in range (+) APC pull-in range (-) [Chroma block] : NTSC ACC amplitude characteristics 1 ACC amplitude characteristics 2 Demodulation output ratio R-Y/B-Y : NTSC ACCM1_N RB_N Input : +6dB/0dB 0dB = 40IRE 0.8 1.0 1.2times times times times deg deg deg dB Hz -350+10Hz deg deg -35deg PULIN+_P PULIN-_P 350 -350Hz Hz ACCM2_N Input :-20dB/0dB R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center 0.7 1.0 1.10.80 0.90 1.000.24 0.30 0.3899 104 109227 240 250243 -40 350 -10 35 253 -35 0 263-28Demodulation output ratio G-Y/B-Y : NTSC GB_N Demodulation angle B-Y/R-Y : NTSC Demodulation angle G-Y/B-Y : NTSC Demodulation angle switch G-Y/B-Y : NTSC Killer operating point APC pull-in range (+) APC pull-in range (-) Tint center Tint variable range (+) Tint variable range (-) [Deflection block] Horizontal free-running frequency Horizontal pull-in range fH fH PULL ANGBR_N R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center ANGGB_N R-Y/B-Y_GainBalance_DAC, R-Y/B-Y_Angle_DAC = Center ANGGC_N KILL_N PULIN+_N PULIN-_N TINCEN TINT+ TINT- G-Y Angle_DAC = 1 0dB = 40IRE 530 680 830Hz Hz ±400 Horizontal output pulse width Hduty Horizontal output pulse saturation voltage Vertical free-running cycle 50 Vertical free-running cycle 60 Horizontal output pulse phase Horizontal output pulse phase Horizontal position adjustment range Horizontal position adjustment maximum variability width Horizontal blanking left @0 Horizontal blanking left @7 Horizontal blanking right @0 Horizontal blanking right @7 Sand castle pulse crest value H Sand castle pulse crest value M1 Sand castle pulse crest value L Sand castle pulse crest value M2 Burst gate pulse width Burst gate pulse phase BLKL0 BLKL : 000 BLKL7 BLKL : 111 BLKR0 BLKR7 BLKR : 000 BLKR : 111 V Hsat VFR50 VFR60 HPHCENpal HPHCENnt HPHrange 5bit 36.1 37.6 39.1µs 0 312.0 262.0 9.5 9.5 0.2 312.5 262.5 10.5 10.5 ±2.2 0.4313.0263.011.511.5V H H µs µs µs ns ns ns ns ns V V V V µs µs V V HPHstep 200.07500 8300 910010800 11600 124001800 -1100 2600 -300 3400500SANDH SANDM1 SANDL SANDM2 BGPWD BGPPH VXRAY VSIZE : 1000000 VSIZE : 1000000 VSIZE : 0000000 VSIZE : 1111111 5.3 5.6 5.93.7 4.0 4.30.1 0.4 0.71.7 2.0 2.33.5 4.0 4.54.9 5.4 5.93.30 3.60 3.900.59 0.69 0.79Horizontal output stop voltage Hstop X-ray protection circuit operating voltage [Vertical screen size adjustment] Vertical ramp output amplitude PAL@64 Vspal64 Vertical ramp output amplitude NTSC@64 Vsnt64 Vertical ramp output amplitude PAL@0 Vspal0 Vertical ramp output amplitude PAL@127 Vspal127 [High-voltage dependent vertical size correction] Vertical size correction @0 Vsizecomp VCOMP : 000 0.75 0.85 0.950.75 0.85 0.950.40 0.50 0.601.05 1.20 1.35Vp-p Vp-p Vp-p Vp-p 0.83 0.88 0.93ratio Continued on next page. No.0069-5/39 LA76832N Continued from preceding page. Ratings Parameter Symbol Conditions Unit min typ max [Vertical screen position adjustment] Vertical ramp DC voltage PAL@32 Vertical ramp DC voltage NTSC@32 Vertical ramp DC voltage PAL@0 Vertical ramp DC voltage PAL@63 Vertical linearity @16 Vertical linearity @0 Vertical linearity @31 Vertical S-shaped correction @16 Vertical S-shaped correction @0 Vertical S-shaped correction @31 [Horizontal screen size adjustment] East/West DC Voltage@32 East/West DC Voltage@0 East/West DC Voltage@63 EWdc32 EWdc0 EWdc63 EWDC : 100000 EWDC : 000000 EWDC : 111111 1.90 0.90 2.90 2.30 1.30 3.30 2.701.703.70Vdc Vdc Vdc Vdcpal32 VDC : 100000 Vdcnt32 VDC : 100000 Vdcpal0 VDC : 000000 Vdcpal63 VDC : 111111 Vlin16 Vlin0 Vlin31 VScor16 VScor0 VScor31 VLIN : 10000 VLIN : 00000 VLIN : 11111 VSC : 10000 VSC : 00000 VSC : 11111 2.25 2.40 2.552.25 2.40 2.551.85 2.00 2.152.65 2.80 2.950.85 1.17 0.57 0.55 0.85 0.36 1.00 1.32 0.72 0.70 1.00 0.51 1.151.470.870.851.150.66Vdc Vdc Vdc Vdc ratio ratio ratio ratio ratio ratio [High-voltage dependent horizontal size compensation] Horizontal size compensation@0 [Pincushion correction] East/West amplitude@32 East/West amplitude@0 East/West amplitude@63 [Correction of trapezoidal distortion] East/West parabolic tilt@32 East/West parabolic tilt@0 East/West parabolic tilt@63 [Correction of corner distortion] East/West parabolic corner top East/West parabolic corner bottom EWcorTOP EWcorBOT CORTOP : 1111-0000 0.30 0.70 1.10V EWtilt32 EWtilt0 EWtilt63 EWTILT : 100000 EWTILT : 000000 EWTILT : 111111 -0.40 -1.40 0.60 0.00 -1.00 1.00 +0.40-0.61.40V V V EWamp32 EWamp0 EWamp63 EWAMP : 100000 EWAMP : 000000 EWAMP : 111111 0.90 -0.40 2.20 1.30 0.00 2.60 1.70+0.403.00Vp-p Vp-p Vp-p Hsizecomp HCOMP : 000 0.1 0.3 0.50V CORBOTTOM : 1111-0000 0.30 0.70 1.10V Test Conditions at Ta = 25°C, VCC = V8 = V31 = V43 = 5.0V, I18 = 19mA, ICC = I25 = 27mA TestInput Parameter Symbol pointsignal [Circuit voltage, current] Horizontal supply voltage (pin 25) RGB supply voltage (pin 18) IF supply current (pin 8) V25 V18 I8 (CDDICC) CCD supply current (pin 31) Video/vertical supply current (pin 43) I8 (CDDICC) I43 (DEFICC) 25 18 8 No signal No signal No signal Apply a current of 27mA to pin 25 and measure the voltage at pin 25. Apply a current of 19mA to pin 18 and measure the voltage at pin 18. Apply a voltage of 5.0V to pin 8 and measure the incoming DC current (mA). (IF AGC 2.5V applied) 31 43 No signal No signal Apply a voltage of 5.0V to pin 31 and measure the incoming DC current (mA). Apply a voltage of 5.0V to pin 43 and measure the incoming DC current (mA). Initial Initial Initial Initial Initial Test method Bus conditions No.0069-6/39 LA76832N VIF Block Input Signals and Test Conditions 1. Input signals must all be input to the PIF IN (pin 6) in the Test Circuit. 2. All input signal voltage values are the levels at the VIF IN (pin 6) in the Test Circuit. 3. Signal contents and signal levels 4. Bus control condition : VIF SYS = ”10” Input signal SG1 SG2 SG3 SG4 SG5 SG6 45.75MHz fm = 15kHz, AM = 78% 45.75MHz 87.5% Video Mod. 10-stairstep wave (Subcarrier : 3.58MHz) Frequency variable 41.25MHz 42.17MHz Waveform Conditions 45.75MHz 5. Before measurement, adjust the DAC as follows. Parameter Video Level DAC Test point 46 Input signal SG6, 80dBµ Test method Set the output level at pin 46 as close to 2.0Vp-p as possible. No.0069-7/39 LA76832N Test Parameter Symbol point [VIF block] Maximum RF AGC voltage Minimum RF AGC voltage RF AGC Delay Pt (@DAC = 0) RF AGC Delay Pt (@DAC = 63) Input sensitivity Vi RFAGC63 VRFH VRFL RFAGC0 4 4 4 4 46 SG1 80dBµ SG1 80dBµ SG1 SG1 SG6 Obtain the input level at which the DC voltage at pin 4 becomes 4.5V. Obtain the input level at which the DC voltage at pin 4 becomes 4.5V. Using an oscilloscope, observe the level at pin 46 and obtain the input level at which the waveform's p-p value becomes 1.4Vp-p. No-signal video output voltage Sync signal tip level Video output amplitude Video S/N VOtip VO S/N VOn 46 46 46 46 No signal SG1 80dBµ SG6 80dBµ SG1 80dBµ SG1 SG2 SG3 Using an oscilloscope, observe the level at pin 46 and measure the waveform’s p-p value. Measure the noise voltage (Vsn) at pin 46 with an RMS voltmeter through a 10kHz to 4.2MHz band-pass filter and calculate 20Log (1.43/Vsn). C-S beat level IC-S 46 Input a 80dBµ SG1 signal and measure the DC voltage (V3) at pin 3. Mix SG1 = 74dBµ, SG2 = 64dBµ, and SG3 = 64dBµ to enter the mixture in the VIF IN. Apply V3 to pin 3 from an external DC power supply. Using a spectrum analyzer, measure the difference between pin 46’s 3.58MHz component and 920MHz component. Differential gain Differential phase Maximun AFT output voltage Minimun AFT output voltage AFT detection sensitivity VAFTS VAFTL DG DP VAFTH 46 46 10 SG5 80dBµ SG5 80dBµ SG4 80dBµ SG4 80dBµz SG4 80dBµz Using a vector scope, measure the level at Pin 46. Using a vector scope, measure the level at Pin 46. Set and input the SG4 frequency to 44.75MHz to be input. Measure the DC voltage at pin 10 at that moment. 10 Set and input the SG4 frequency to 46.75MHz to be input. Measure the DC voltage at pin 10 at that moment. 10 Adjust the SG4 frequency and measure frequency deviation ∆f when the DC voltage at pin 10 changes from 1.5V to 3.5V. VAFTS = 2000/∆f [mV/kHz] APC pull-in range (U), (L) fPU, fPL 46 SG4 80dBµ Connect an oscilloscope to pin 46 and adjust the SG4 frequency to a frequency higher than 45.75MHz to bring the PLL into unlocked mode. (A beat signal appears.) Lower the SG4 frequency and measure the frequency at which the PLL locks again. In the same manner, adjust the SG4 frequency to a lower frequency to bring the PLL into unlocked mode. Lower the SG4 frequency and measure the frequency at which the PLL locks again. Set IF AGC = “1” and measure the DC voltage at pin 46. Measure the DC voltage at pin 46. RF. AGC = ”111111”RF. AGC = ”000000”Measure the DC voltage at pin 4. RF. AGC = ”111111”Measure the DC voltage at pin 4. RF. AGC = ”000000”Input signal Test method Bus conditions No.0069-8/39 LA76832N SIF Block (FM block) Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. Bus control condition : IF. AGC. SW = “1”, SIF.SYS = ”00”, DEEM-TC = ”1”, FM.GAIN = ”1” 2. SW : IF1 = “ON” 3. Input signals are input to pin 54 and the carrier frequency is 4.5MHz. Test Parameter Symbol point FM detection output voltage SOADJ 2 Input signal 90dBµ, fm = 400Hz, FM = ±25kHzTest method Adjust the DAC (FM. LEVEL) such that the 400 Hz component of the FM detection output at pin 2 become as close to 500 mVrms as possible and measure (SV1 : mVrms) the output at that moment. FM limiting sensitivity SLS 2 fm = 400Hz, FM = ±25kHz90dBµ, fm = 100kHz, FM = ±25kHzSTHD 90dBµ, fm = 400Hz, FM = ±25kHzAM rejection ratio SAMR 2 90dBµ, fm = 400Hz, AM = 30% Measure the 1kHz component (SV3 : mVrms) of the FM detection output at pin 2. Assign the measured value to SV3 and calculate as follows : SAMR = 20Log (SV1/SV3) [dB] SIF. S/N SSN 2 90dBµ, CW 90dBµ, fm = 2.12kHz,FM = ±25kHzMeasure the noise level (DIN AUDIO, SV4 : mVrms) at pin 2. Calculate as follows : SSN = 20Log (SV1/SV4) [dB] NT de-emph time constant SNTC 2 Measure the 2.12kHz component (SV5 : mVrms) of the FM detection output at pin 2 and calculate as follows : SNTC = 20Log (SV1/SV5) [dB] FM level = Adjustment value FM level = Adjustment value FM level = Adjustment value Measure the input level (dBµ) at which the 400Hz component of the FM detection output at pin 2 becomes -3dB relative to SV1. FM detection output f characteristics (fm=100kHz) FM detection output distortion SF 2 Set SW : IF1 = \"OFF\". Measure (SV2 : mVrms) the FM detection output of pin 2. Calculate as follows : SF = 20Log (SV1/SV2) [dB] 2 Measure the distortion factor of the 400Hz component of the FM detection output at pin 2. FM level = Adjustment value FM level = Adjustment value FM level = Adjustment value Bus conditions No.0069-9/39 LA76832N Audio Block Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. Bus control condition : AUDIO. MUTE = ”0”, AUDIO. SW = ”1”, VOL. FIL = ”0” , SIF. SYS = ”00”, IF. AGC. SW = ”1” 2. Input 4.5MHz, 90dBµ and CW at pin 54. 3. Enter an input signal from pin 51. Test Parameter Symbol point Maximum gain AGMAX 1 Input signal 1kHz, CW 500mVrms 1kHz, CW 500mVrms 20kHz, CW 500mVrms 20kHz, CW 500mVrms 1kHz, CW 500mVrms No signal Test method Measure the 1kHz component (V1 : mVrms) at the pin 1 and calculate as follows : AGMAX = 20Log (V1/500) [dB] Variable range ARANGE 1 Measure the 1kHz component (V2 : mVrms) at the pin 1 and calculate as follows : ARANGE = 20Log (V1/V2) [dB] Frequency characteristics AF 1 Measure the 20kHz component (V3 : mVrms) at the pin 1 and calculate as follows : AF = 20Log (V3/V1) [dB] Mute Distortion ATHD S/N ASN 1 1 AMUTE 1 Measure the 20kHz component (V4 : mVrms) at the pin 1 and calculate as follows : AMUTE = 20Log (V3/V4) [dB] Measure the distortion of the 1kHz component at the pin 1. Measure the noise level (DIN AUDIO, V5 : mVrms) at the pin 1 and calculate as follows : ASN = 20Log (V1/V5) [dB] Crosstalk ACT 1 1kHz, CW 500mVrms Measure the 1kHz component (V6 : mVrms) at the pin 1 and calculate as follows : ACT = 20Log (V1/V6) [dB] Bus conditions VOLUME = \"1111111\" VOLUME = \"0000000\" VOLUME = \"1111111\" VOLUME = \"1111111\" AUDIO.MUTE = ”1” VOLUME = \"1111111\" VOLUME = \"1111111\" VOLUME = \"1111111\" AUDIO. SW = \"0\" No.0069-10/39 LA76832N Video Block Input Signals and Test Conditions 1. C IN Input∗chroma burst signal : 40 IRE 2. Y IN input signal 100IRE : 714mV 3. Bus control bit conditions : Initial test state ∗OIRE signal (L-O) : NTSC standard sync signal ∗XIRE signal (L-X) ∗CW signal (L-CW) ∗BLACK STRETCH OIRE signal (L-BK) No.0069-11/39 LA76832N 4. R/G/B IN Input signal RGB Input signal 1 (O-1) RGB Input signal 2 (O-2) Test Input Parameter Symbol point signal [Video block] Video overall gain (Contrast max) Contrast adjustment characteristics (normal/max) Contrast adjustment characteristics (min/max) Video frequency Characteristics 1 (SVHS) BW1 21 L-CW CONT0 21 L-50 CONT63 CONT127 21 L-50 Measure the output signal’s 50IRE amplitude (CNTHB Vp-p) and calculate CONT127 = 20Log (CNTHB/0.357). 21 L-50 Measure the output signal’s 50IRE amplitude (CNTCB Vp-p) and calculate CONT63 = 20Log (CNTCB/0.357). Measure the output signal’s 50IRE amplitude (CNTLB Vp-p) and calculate CONT0 = 20Log (CNTLB/0.357). With the input signal’s continuous wave = 100kHz, measure the output signal’s continuous wave amplitude (PEAKDC Vp-p). With the input signal’s continuous wave = 6MHz, measure the output signal’s continuous wave amplitude (CW1.4 Vp-p). Calculate BW1 = 20Log (CW1.4/PEAKDC). Video frequency Characteristics 2 (PAL) Video frequency Characteristics 3 (NTSC) Chroma trap amount PAL CtraPP L-CW BW3 L-CW BW2 21 L-CW With the input signal’s continuous wave = 1.8MHz, measure the output signal’s continuous wave amplitude (CW1.8 Vp-p). Calculate BW2 = 20Log (CW1.8/PEAKDC). 21 With the input signal’s continuous wave = 3.4MHz, measure the output signal’s continuous wave amplitude (CW3.4 Vp-p). Calculate BW3 = 20Log (CW3.4/PEAKDC). 21 With the input signal’s continuous wave = 4.43MHz, measure the output signal’s continuous wave amplitude (F0P Vp-p). Calculate CtraP = 20Log (F0P/PEAKDC). Chroma trap amount NTSC CtraPN 21 L-CW With the input signal’s continuous wave = 3.58MHz, measure the output signal’s continuous wave amplitude (F0N Vp-p). Calculate CtraN = 20Log (F0N/PEAKDC). FILTER SYS : 000 SHARPNESS : 000000 FILTER SYS : 010 SHARPNESS : 000000 FILTER SYS : 100 SHARPNESS : 000000 FILTER SYS : 010 SHARPNESS : 000000 FILTER SYS : 000 SHARPNESS : 000000 CONTRAST : 0000000 CONTRAST : 0111111 CONTRAST : 1111111 Test method Bus bit/input signal Continued on next page. No.0069-12/39 LA76832N Continued from preceding page. Test Input Parameter Symbol point signal DC transmission amount ClampG 21 L-0 L-100 (BRTPL V). Measure the output signal’s 0IRE DC level (DRVPH V) and 100IRE amplitude (DRVH Vp-p) and calculate ClampG = 100× (1+ (DRVPH- BRTPL)/DRVH). Y-DL TIME1 (SVHS) TdY1 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Y-DL TIME2 (PAL) TdY2 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Y-DL TIME3 (NTSC) TdY3 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Y-DL TIME4 (SECAM) TdY4 21 L-50 Obtain the time difference (the delay time) from when the rise of the input signal's 50IRE amplitude to the output signal's 50IRE amplitude. Maximum black stretch gain BKSTmax 21 L-BK Measure the 0IRE DC level (BKST1 V) at point A of the output signal in the Black Stretch Defeat (Black Stretch OFF) mode. Measure the 0IRE DC level (BKST2 V) at point A of the output signal in the Black Stretch ON mode. Calculate BKSTmax = 2×50× (BKST1-BKST2) /CNTHB. Black stretch threshold ∆black (60IRE ∆black) BKSTTH∆ 21 L-60 Measure the 60IRE DC level (BKST3 V) of the output signal in the Black Stretch Defeat ON mode. Measure the 60IRE DC level (BKST4 V) of the output signal in the Black Stretch Defeat (Black Stretch OFF) mode. Calculate BKSTTH∆ = 50× (BKST4-BKST3)/CNTHB. Sharpness variability characteristics (max) Sharp63 (normal) Sharp31 21 L-CW With the input signal’s continuous wave = 2.2MHz, measure the output signal’s continuous wave amplitude (F00S31 Vp-p). Calculate Sharp31 = 20Log (F00S31/PEAKDC). L-CW With the input signal’s continuous wave = 2.2MHz, measure the output signal’s continuous wave amplitude (F00S63 Vp-p). Calculate Sharp63 = 20Log (F00S63/PEAKDC). (min) Sharp0 L-CW With the input signal’s continuous wave = 2.2MHz, measure the output signal’s continuous wave amplitude (F00S0 Vp-p). Calculate Sharp0 = 20Log (F00S0/PEAKDC). Horizontal/vertical blanking output level [OSD block] OSD Fast SW threshold FSTH L-0 O-2 L-50 L-0 O-2 RGBBLK 21 L-100 Measure the DC level (RGBBLK V) for the output signal’s blanking period. Bus control bit conditions : Contrast=63, Brightness=63 21 Apply voltage to pin 17 and measure the voltage at pin 17 at the point where the output signal switches to the OSD signal. Red RGB output level ROSDC 19 Measure the output signal’s 50IRE amplitude (CNTCR Vp-p). Measure the OSD output amplitude (OSDHR Vp-p). Pin 17 : 3.5V Contrast : 0111111 Brightness : 0111111 Pin 16A : O-2 applied FILTER SYS : 0000 Sharpness : 000000 FILTER SYS : 0000 Sharpness : 111111 FILTER SYS : 0000 Sharpness : 100000 Blk Str DEF : 0 Blk Str DEF : 0 FILTER SYS : 1000 FILTER SYS : 0000 FILTER SYS : 0010 FILTER SYS : 0100 Test method Measure the output signal’s 0IRE DC level Bus bit/input signal Brightness : 0000000 CONTRAST : 1111111 Brightness : 0000000 CONTRAST : 1111111 Pin 14A : O-2 applied Calculate ROSDH = 50× (OSDHR/CNTCR). Continued on next page. No.0069-13/39 LA76832N Continued from preceding page. Test Input Parameter Symbol point signal Green RGB output level GOSDC 20 L-50 L-0 O-2 (CNTCG Vp-p). Measure the OSD output amplitude (OSDHG Vp-p). Test method Measure the output signal’s 50IRE amplitude Pin 17 : 3.5V Bus bit/input signal Pin 15A : O-2 applied Calculate GOSDC = 50× (OSDHG/CNTCG). Measure the output signal’s 50IRE amplitude (CNTCB Vp-p). Measure the OSD output amplitude (OSDHB Vp-p). Pin 17 : 3.5V Blue RGB output level BOSDC 21 L-50 L-0 O-2 Pin 16A : O-2 applied Calculate BOSDC = 50× (OSDHB/CNTCB) Measure the amplitudes at point A (0.35V portion of the input signal 0-1) and point B (0.7V portion of the input signal 0-1) of the output signal. Assign the measured values to RGBLR Vp-p and RGBHR Vp-p, respectively. Pin 17 : 3.5V Pin 14A : O-1 applied Analog OSD R output level 19 L-0 O-1 Gain match RRGB linearity LRRGB Analog OSD G output level Gain match GRGB 20 Calculate RRGB = RGBLR/CNTCR. Calculate LRRGB = 100× (RGBLR/RGBHR). L-0 O-1 Measure the amplitudes at point A (0.35V portion of the input signal 0-1) and point B (0.7V portion of the input signal 0-1) of the output signal. Assign the measured values to RGBLG Vp-p and RGBHG Vp-p, respectively. Pin 17 : 3.5V Pin 15A : O-1 applied linearity LGRGB Analog OSD B output level Gain match BRGB 21 Calculate GRGB = RGBLG/CNTCG. Calculate LGRGB = 100× (RGBLG/RGBHG). L-0 O-1 Measure the amplitudes at point A (0.35V portion of the input signal 0-1) and point B (0.7V portion of the input signal 0-1) of the output signal. Assign the measured values to RGBLB Vp-p and RGBHB Vp-p, respectively. Pin 17 : 3.5V Pin 16A : O-1 applied linearity LBRGB [RGB output block] (Cutoff, drive block) Brightness control Calculate BRGB = RGBLB/CNTCB. Calculate LBRGB = 100× (RGBLB/RGBHB). Bus control bit conditions : Contrast = 127 L-0 Measure the 0IRE DC levels of the respective output signals of R output (19), G output (20), and B output (21). Assign the measured values to BRTPCR, BRTPCG, and BRTPCB V, respectively. Calculate BRT63 = (BRTPCR+BRTPCG+BRTPCB) /3. Measure the 0IRE DC level of the output signal of B output (21) and assign the measured value to BRTPHB. Calculate BRT127 = 50× (BRTPHB-BRTPCB)/CNTHB. Brightness : 0000000 Brightness : 1111111 Contrast : 1111111 Brightness : 01111111 (normal) BRT63 19 20 21 (max) BRT127 21 (min) BRT0 Measure the 0IRE DC level of the output signal of B output (21) and assign the measured value to BRTPLB. Calculate BRT0 = 50× (BRTPLB-BRTPCB)/CNTHB. Continued on next page. No.0069-14/39 LA76832N Continued from preceding page. Test Input Parameter Symbol point signal Bias (cutoff) control (max) Vbias255 (min) Vbias0 19 20 21 L-50 Test method Measure the 0IRE DC levels (Vbias0* V) of the respective output signals of R output (19), G output (20), and B output (21). * : R, G, and B Measure the 0IRE DC levels (Vbias255* V) of the respective output signals of R output (19), G output (20), and B output (21). * : R, G, and B Bias (cutoff) control resolution Vbiassns Measure the 0IRE DC levels (BAS80* V) of the respective output signals of R output (19), G output (20), and B output (21). * : R, G, and B Measure the 0IRE DC levels (BAS48* V) of the respective output signals of R output (19), G output (20), and B output (21). Calculate Vbiassns* = (BAS80*-BAS48*) /32 Sub-bias control resolution Vsbiassns Sub-Brightness : 0101010 Contrast : 0111111 Brightness : 0000000 Red/Green/Blue Bias : 00110000 Sub-Brightness : 1111111 Red/Green/Blue Bias : 11111111 Red/Green/Blue Bias : 01010000 Bus bit/input signal Sub-Brightness : 0000000 L-50 Measure the 0IRE DC levels (SBTPM* V) of the respective output signals of R output (19), G output (20), and B output (21). Calculate Vsbiassns* = (BRTPC*-SBTPM*) Drive adjustment maximum output RBout127 Gout15 19 20 21 L-100 Measure the 100IRE amplitudes (DRVH* Vp-p) of the respective output signals of R output (19) and B output (21). * : R and B Measure the 100IRE amplitude of the output signal of G output (20) and assign the measured value to DRVH* Vp-p. * : G Output attenuation RBout0 Measure the 100IRE amplitudes (DRVL* Vp-p) of the respective output signals of R output (19), G output (20), and B output (21). * : R and B Measure the 100IRE amplitude of the output signal of G output (20) and assign the measured value to DRVL* Vp-p. * : G Brightness : 0000000 Red/Blue Drive : 0000000 Gout0 [VIDEO SW block] Video signal input 1DC voltage Video signal input 2DC voltage SVO terminal DC voltage SVO terminal AC voltage SVODC SVOAC VIN2DC VIN1DC 42 44 40 40 L-100 L-100 L-100 L-100 RBout0* = 20Log (DRVH*/DRVL*) Gout0* = 20Log (DRVH*/DRVL*) Contrast: 0111111 Brightness : 01111111 VIDEO SW : 1 VIDEO SW : 0 VIDEO SW : 1 VIDEO SW : 1 Bus control bit conditions : Contrast = 63, Brightness = 63 Input signals to pin 42 and measure the voltage of the pedestal. Input signals to pin 44 and measure the voltage of the pedestal. Input signals to pin 42 and measure the voltage of the pedestal at pin 40. Input signals to pin 42 and measure the voltage of the pedestal at pin 40. No.0069-15/39 LA76832N Chroma Block Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. VIF, SIF blocks : No signal 2. Deflection Block : Horizontal/vertical composite sync signals are input and the deflection block must be locked into the sync signals (Refer to the Deflection Block Input Signals and the Test Conditions). 3. Bus control conditions : Set the following conditions unless otherwise specified. Y Input is 42 Pin (EXT-V IN), C Input is 44 Pin (S-C IN) (Video SW = 1, C. Ext = 1) Other DAC except the above-mentioned conditions is all initial conditions. 4. Y Input condition: No signal unless otherwise specified. (Sync is necessary to obtain synchronization). 5. How to calculate the demodulation ratio and angle : B-Y axis angle = tan-1 (B ( 0) /B (270) ) +270° R-Y axis angle = tan-1 (R (180) /R ( 90) ) +90° G-Y axis angle = tan-1 (G (270) /G (180) ) +180° B-Y axis amplitude Vb = SQRT (B ( 0) ∗ B ( 0) +B (270) ∗B (270) ) R-Y axis amplitude Vr = SQRT (R (180) ∗R (180) +R (90) ∗R (90) ) G-Y axis amplitude Vg = SQRT (G (180) ∗G (180) +G (270) ∗G (270) ) No.0069-16/39 LA76832N 6. Chroma input signal : As for the PAL signal, the burst swings such as 130° and 225° every one hour. Chroma describes the phase caused when the burst occurs at 135°. As for the NTSC signal, the burst occurs constantly at 180°. The figures below are based on the phase of NTSC. When a PAL signal is generated, adjust the phase and then enter signals. The item common to both PAL and NTSC is the PAL signal. For those other than this, the measurement must be performed for each individual signals. The condition of fsc: Set the following conditions unless otherwise specified. PAL = 4.433619MHz NTSC = 3.579545MHz C-1 X IRE signal (L-X) C-2 C-3 (Note : fsc±N*fh when the frequency is specified. N should be a natural number and the nearest value should be used.) C-4 C-5 No.0069-17/39 LA76832N Test Parameter Symbol point [Chroma block] : PAL/NTSC common B-Y/Y amplitude ratio CLRBY Bout YIN : L77 CIN : No signal 21 C-2 Measure the Y system’s output level. V1 Input a signal to the CIN (only sync signal to the YIN) and measure the output level to calculate as follows : CLRBY = 100× (V2/V1)+15% Color control characteristics 1 CLRMN 21 C-1 Measure the output amplitude V1 at color control MAX mode and output amplitude V2 at color control CEN mode and, calculate as follows : CLRMN = V1/V2 Color control characteristics 2 Color control sensitivity CLRSE CLRMM 21 C-1 Measure the output amplitude V3 at color control MIN mode to calculate as follows : CLRMM = 20Log (V1/V3) 21 C-1 Measure the output amplitude V4 at color control 90 mode and output amplitude V5 at color control 38 mode to calculate as follows : CLRSE = 100× (V4-V5) / (V2×52) Residual higher harmonic level B Residual higher harmonic level R Residual higher harmonic level G [Chroma block] : PAL ACC amplitude characteristics 1 ACCM1_P Bout C-1 0dB 21 +6dB Measure the output amplitude when 0dB is applied to the chroma input and the output amplitude when +6dB is applied to the chroma input and calculate the ratio between them. ACCM1 = 20Log (+6dBdata/0dBdata) ACC amplitude characteristics 2 ACCM2_P Bout C-1 -20dB 21 Measure the output amplitude when -20dB is applied to the chroma input and calculate the ratio between them. ACCM2 = 20Log (-20dBdata/0dBdata) Demodulation output ratio R-Y/B-Y : PAL Demodulation output ratio G-Y/B-Y : PAL Demodulation output ratio G-Y/R-Y : PAL Demodulation angle R-Y/B-Y : PAL APC pull-in range (+) PULIN+_P 21 C-1 Decrease the chroma fsc frequency from 4.433619MHz+1000Hz and measure the frequency at which the VCO locks. APC pull-in range (-) PULIN-_P 21 C-1 Increase the chroma fsc frequency from 4.433619MHz-1000Hz and measure the frequency at which the VCO locks. ANGBR_P 21 19 C-1 Refer to 5. and measure the B-Y and R-Y demodulation angle and calculate. Color : 1000000 GB_P 20 19 C-5 Measure ROUT output amplitude Vrp and GOUT output amplitude Vgbp. And calculate GR_P = Vgrp/Vrp. Color : 1000000 GB_P 21 20 C-4 Measure Bout output amplitude Vbp and GOUT output amplitude Vgbp. And calculate GB_P = Vgbp/Vbp. Color : 1000000 RB_P 21 19 C-1 Refer to 5. and measure Bout output amplitude Vb and ROUT output amplitude Vr. And calculate RB = Vr/Vb. Color : 1000000 Color : 1000000 Color : 1000000 E_CAR_B 21 C-1 Burst only Measure the 8.86MHz component output amplitude at pin 21. Measure the 8.86MHz component output amplitude at pin 19. Measure the 8.86MHz component output amplitude at pin 20. Color : 1000000 Color : 1111111 Color : 1000000 Color : 0000000 Color : 1011010 Color : 0100110 Input signal Test method Bus conditions E_CAR_R Rout Burst only 19 E_CAR_G Gout C-1 20 Burst only Continued on next page. No.0069-18/39 LA76832N Continued from preceding page. Test Parameter Symbol point [Chroma block] : NTSC ACC amplitude characteristics 1 ACCM1_N Bout C-1 0dB 21 +6dB Measure the output amplitude when 0dB is applied to the chroma input and the output amplitude when +6dB is applied to the chroma input and calculate the ratio between them. ACCM1 = 20Log (+6dBdata/0dBdata) ACC amplitude characteristics 2 ACCM2_N Bout C-1 -20dB 21 Measure the output amplitude when 20dB is applied to the chroma input and calculate the ratio between them. ACCM2 = 20Log(-20dBdata/0dBdata) Demodulation output ratio R-Y/B-Y : NTSC Demodulation output ratio R-Y/B-Y : NTSC Demodulation angle B-Y/R-Y : NTSC Demodulation angle G-Y/B-Y : NTSC Killer operating point KILL_N 21 C-1 Reduce the input signal until the output level becomes 150mVp-p or less. Measure the input level at that moment. APC pull-in range (+) PULIN+_N 21 C-1 Decrease the chroma fsc frequency from 3.579545MHz+1000Hz and measure the frequency at which the VCO locks. APC pull-in range (-) PULIN-_N 21 C-1 Increase the chroma fsc frequency from 3.579545MHz-1000Hz and measure the frequency at which the VCO locks. Tint center Tint variable range (+) TINCEN TINT+ 21 21 C-1 C-1 Measure each part of the output level and calculate the B-Y axis angle. Measure each part of the output level and calculate the B-Y axis angle. TINT+ = B-Y axis angle -TINCEN Tint variable range (-) TINT- 21 C-1 Measure each part of the output level and calculate the B-Y axis angle. TINT- = B-Y axis angle -TINCEN [Filter Block Chroma BPF Characteristic] C-BPF1A Peaker amplitude characteristic 3.93MHz CBPF1A 21 C-3 PAL signal Set the chroma frequency (CW) to 4.433619MHz-100kHz and measure V0 output amplitude. And then, set the chroma frequency (CW) to 3.93MHz and measure V1 output amplitude to calculate as follows : CBPF1A = 20Log (V1/V0) C-BPF1B Peaker amplitude characteristic 4.73/4.13MHz C-BPF1C Peaker amplitude characteristic 4.93/3.93MHz CBPF1B C-3 PAL signal CBPF1B 21 C-3 PAL signal Measure V2 output amplitude when the chroma frequency (CW) is 4.13MHz and V3 output amplitude when it (CW) is 4.73MHz to calculate as follows : CBPF1B = 20Log (V3/V2) 21 Set the chroma frequency (CW) to 4.93MHz and measure V4 output amplitude to calculate as follows : CBPF1C = 20Log (V4/V1) FILTER SYS = 0010C. BYPASS = 0 FILTER SYS = 0010C. BYPASS = 0 FILTER SYS = 0010C. BYPASS = 0 TINT : 0000000 TINT : 1111111 TINT : 1000000 ANGGB_N 21 20 C-1 Refer to 5. and measure the B-Y and G-Y demodulation angle and calculate. Reference : B-Y angle Color : 1000000 ANGBR_N 21 19 C-1 Refer to 5. and measure the B-Y and R-Y demodulation angle and calculate. Reference : B-Y angle Color : 1000000 GB_N 20 C-1 Refer to 5. and measure GOUT output amplitude Vg. And calculate GB_N = Vg/Vb. Color : 1000000 RB_N 21 19 C-1 Refer to 5. and measure Bout output amplitude Vb and ROUT output amplitude Vr. And calculate RB = Vr/Vb. Color : 1000000 Input signal Test method Bus conditions Continued on next page. No.0069-19/39 LA76832N Continued from preceding page. Test Parameter Symbol point C-BPF2A BandPass amplitude characteristic 3.93MHz CBPF2A 21 C-3 PAL signal Input signal Test method Set the chroma frequency (CW) to 4.433619MHz-100MHz and measure V00 output amplitude. And then, set the chroma frequency (CW) to 3.93MHz and measure V10 output amplitude to calculate as follows : CBPF2A = 20Log (V10/V00) C-BPF2B BandPass amplitude characteristic 4.73/4.13MHz C-BPF2C BandPass amplitude characteristic 4.93/3.93MHz CBPF2C C-3 PAL signal CBPF2B 21 C-3 PAL signal Measure V20 output amplitude when the chroma frequency (CW) is 4.13MHz and V30 output amplitude when it (CW) is 4.73MHz to calculate as follows : CBPF2B = 20Log (V30/V20) 21 Set the chroma frequency (CW) to 4.93MHz and measure V40 output amplitude to calculate as follows : CBPF2C = 20Log (V40/V10) FILTER SYS = 0011C. BYPASS = 0 FILTER SYS = 0011C. BYPASS = 0 Bus conditions FILTER SYS = 0011C. BYPASS = 0 No.0069-20/39 LA76832N Deflection Block Input Signals and Test Conditions Unless otherwise specified, the following conditions apply when each measurement is made. 1. VIF, SIF blocks : No signal 2. C input : No signal 3. Sync input : A horizontal/vertical composite sync signal PAL : 43IRE, horizontal sync signal (15.625kHz) and vertical sync signal (50kHz) NTSC : 40IRE, horizontal sync signal (15.734264kHz) and vertical sync signal (59.94kHz) Note : No burst signal, chroma signal shall exist below the pedestal level. 4. Bus control conditions : Initial conditions unless otherwise specified. 5. The delay time from the rise of the horizontal output (pin 27 output) to the fall of the FBP IN (pin 28 input) is 9µs. 6. Pin 13 (vertical size correction circuit input terminal) is connected to VCC (5.0V). Test Parameter Symbol point [Deflection block] Horizontal free-running frequency Horizontal pull-in range fH PULL fH 27 Y IN : No signal Y IN : Horizontal /vertical sync signal PAL Horizontal output pulse length Hduty 27 Y IN : Horizontal /vertical sync signal PAL Horizontal output pulse saturation voltage V Hsat 27 Y IN : Horizontal /vertical sync signal PAL Measure the voltage for the pin 27 horizontal output pulse’s low-level period. Connect a frequency counter to the output of pin 27 (H out) and measure the horizontal free-running frequency. 42 Using an oscilloscope, monitor the horizontal sync signal which is input to the Y IN (pin 42) and the pin 27 output (H out) and vary the horizontal signal frequency to measure the pull-in range. Measure the voltage for the pin 27 horizontal output pulse’s low-level period. Input signal Test method Bus conditions Continued on next page. No.0069-21/39 LA76832N Continued from preceding page. Test Parameter Symbol point Vertical free-running period 50 (PAL) Vertical free-running period 60 (NTSC) Horizontal output pulse (PAL) (NTSC) Horizontal position adjustment range Horizontal position adjustment maximum variable width POR circuit operating voltage VPOR 25 Y IN : Horizontal /vertical sync signal PAL HPHstep 27 42 Y IN : Horizontal /vertical sync signal PAL HPHrange 27 42 Y IN : Horizontal /vertical sync signal PAL HPHCEN (PAL) (NTSC) 27 42 Y IN : Horizontal /vertical sync signal PAL NTSC Measure the delay time from to the rise of the pin 27 horizontal output pulse to the fall of the Y IN horizontal sync signal. VFR50 VFR60 23 Input signal Y IN : No signal Test method Measure the vertical output period T at pin 23. T×15.625kHz (PAL) T×15.734kHz (NTSC) Bus conditions CDMODE : 001 (PAL) CDMODE : 002 (NTSC) Vertical outputT 2.5V HPHCEN20IRE 2.5V Horizontal output With H PHASE : 0 and 31, measure the delay time from the rise of the pin 27 horizontal output pulse to the fall of the Y IN horizontal sync signal and calculate the difference from H PHCEN. H PHASE : 00000 H PHASE : 11111 Measuring HPHCEN 20IRE 2.5V Horizontal output With H PHASE : 0 to 31 varied, measure the delay time from to the rise of the pin 27 horizontal output pulse to the fall of the Y IN horizontal sync signal and calculate the variation at each step. Retrieve data for maximum variation. H PHASE : 00000 to H PHASE : 11111 Measuring HPHCEN 20IRE Horizontal output Connect a DC power supply in place of the current source to pin 25 and gradually decrease the voltage from 5.0V until the BUS READ TATUS [POR] [STATUS1 (DA01) becomes \"1\". Measure the DC voltage at pin 25 at the moment. Continued on next page. No.0069-22/39 LA76832N Continued from preceding page. Test Parameter Symbol point Horizontal blanking left variable range@0 Horizontal blanking left variable range@7 Horizontal blanking right variable range@0 Horizontal blanking right variable range@7 Sand castle pulse crest value H Sand castle pulse crest value M1 SANDM1 28 Y IN : Horizontal /vertical sync signal PAL Measure the supply voltage at point M1 of the pin 28 FBP IN wave form for Hsync period. SANDH 28 Y IN : Horizontal /vertical sync signal PAL Measure the supply voltage at point H of the pin 28 FBP IN wave form for Hsync period. BLKR7 21 42 Y IN : Horizontal /vertical sync signal PAL Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKR = 111. BLKR : 111 BLKR0 21 42 Y IN : Horizontal /vertical sync signal PAL Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKR = 000. BLKR : 000 BLKL7 21 42 Y IN : Horizontal /vertical sync signal PAL Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKL = 111. BLKL : 111 BLKL0 21 42 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Measure the time T from the left end of Hsync at pin 42 Y IN to the left end of blanking at pin 21 BlueOUT with BLKL = 000. Bus conditions BLKL : 000 Y IN Hsync T Blue Y IN Hsync T Blue Y INT Hsync Blue Y INTHsync Blue H M1 Continued on next page. No.0069-23/39 LA76832N Continued from preceding page. Test Parameter Symbol point Sand castle pulse crest value L Sand castle pulse crest value M2 Burst gate pulse length Burst gate pulse I phase Horizontal output stop voltage X-ray protection circuit operating voltage [Vertical screen size correction] Vertical ramp output amplitude PAL@64 NTSC@64 Vspal64 Vsnt64 23 Y IN : Horizontal /vertical sync signal PAL NTSC Monitor the pin 23 vertical ramp output and measure the voltage at line 24 and line 310. Calculate as follows : Vspal64 = Vline310-Vline24 Vsnt64 = Vline262-Vline22 VXRAY 27 34 Hstop 25 27 Y IN : Horizontal /vertical sync signal Y IN : Horizontal /vertical sync signal Connect a DC power supply to pin 34 and gradually increase the voltage from 0V until the pin 27 horizontal output pulse ceases. Measure the DC voltage at pin 34 at that moment. Decrease the current from a source connected to pin 25 and measure the pin 25 voltage at which HOUT stops. BGPPH 28 42 Y IN : Horizontal /vertical sync signal PAL Measure the time from the left end of Hsync at pin 42 Y IN to the left end of the pin 28 FBP IN wave form for Hsync period. BGPWD 28 Y IN : Horizontal /vertical sync signal PAL Measure the BGP width T of the pin 28 FBP IN wave form for Hsync period. SANDM2 28 Y IN : Horizontal /vertical sync signal PAL Measure the supply voltage at point M2 of the pin 28 FBP IN wave form for Vsync period. SANDL 28 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Measure the supply voltage at point L of the pin 28 FBP IN wave form for Hsync period. Bus conditions L L T Y IN Hsync T FBP IN Vertical ramp output Line 310 Line 24 Continued on next page. No.0069-24/39 LA76832N Continued from preceding page. Test Parameter Symbol point Vertical ramp output amplitude PAL@0 Vertical ramp output amplitude PAL@127 [High-voltage dependent vertical size correction] Vertical size correction@0 [Vertical screen position adjustment] Vertical ramp DC voltage PAL@32 NTSC@32 Vertical ramp DC voltage PAL@0 Vdcpal0 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 167. VDC : 000000 Vdcpal32 Vdcnt32 23 Y IN : Horizontal /vertical sync signal PAL NTSC Monitor the pin 23 vertical ramp output and measure the voltage at line 167. (PAL) Monitor the pin 23 vertical ramp output and measure the voltage at line 142. (NTSC) Vsizecomp 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at the line 24 and line 310 with VCOMP = 000. Calculate as follows : Va = Vline310-Vline24 Apply 4.1V to pin 13 and measure the voltage at the line 24 and line 310 again. Calculate as follows : Va = Vline310-Vline24 Calculate as follows : Vsizecomp = Vb/Va VCOMP : 000 Vspal127 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 24 and line 310. Calculate as follows : Vspal27 = Vline310-Vline24 VSIZE : 1111111 Vspal0 23 Input signal Y IN : Horizontal /vertical sync signal PAL Test method Monitor the pin 23 vertical ramp output and measure the voltage at line 24 and line 310. Calculate as follows : Vspal0 = Vline310-Vline24 Bus conditions VSIZE : 0000000 Vertical ramp output Line 310 Line 24 Vertical ramp output Line 310 Line 24 Vertical ramp output Line 310 Line 24 Vertical ramp output Line 167Vertical ramp output Line 167Continued on next page. No.0069-25/39 LA76832N Continued from preceding page. Test Parameter Symbol point Vertical ramp DC voltage PAL@63 Vertical linearity@16 Vertical linearity@0 Vertical linearity@31 Vertical S-shaped correction @16 Line 36 Line 60Input signal Y IN : Horizontal /vertical sync signal PAL Test method Monitor the pin 23 vertical ramp output and measure the voltage at line 167. Bus conditions VDC : 111111 Vdcpal63 23 Vertical ramp output Line 167Vlin16 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 24, line 167 and 310. Assign the respective measured values to Va, Vb and Vc. Calculate as follows : Vlin16 = (Vb-Va) / (Vc-Vb) Line 310 Vertical ramp outputLine 167 Line 24 Vlin0 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 24, line 167 and 310. Assign the respective measured values to Va, Vb and Vc. Calculate as follows : Vlin0 = (Vb-Va) / (Vc-Vb) VLIN : 00000 Line 310 Vertical ramp outputLine 167 Line 24 Vlin31 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 24, line 167 and 310. Assign the respective measured values to Va, Vb and Vc. Calculate as follows : Vlin31 = (Vb-Va) / (Vc-Vb) VLIN : 11111 Line 310 Vertical ramp outputLine 167 Line 24 VScor16 15 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at line 36, line 60, line 155, line 179, line 274 and 298. Assign the respective measured values to Va, Vb, Vc, Vd, Ve and Vf. Calculate as follows : VScor16 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc) VS : 10000 Vertical ramp outputLine 274 Line 298 Line 179Line 155Continued on next page. No.0069-26/39 LA76832N Continued from preceding page. Test Parameter Symbol point Vertical S-shaped correction @0 Vertical S-shaped correction @31 [Horizontal size adjustment] East/Wst DC voltage@32 East/West DC voltage @0 East/West DC voltage @63 EWdc63 22 Y IN : No signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 167. EWDC : 111111 EWdc0 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 167. EWDC : 000000 EWdc32 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 167. Line 36 Line 60Line 179Line 155Line 36 Line 60Input signal Y IN : Horizontal /vertical sync signal PAL Test method Monitor the pin 23 vertical ramp output and measure the voltage at the line 36, line 60, line 155, line 179, line 274 and line 298 with VSC = 00000. Assign the respective measured values to Va, Vb, Vc, Vd, Ve and Vf. Calculate as follows : VScor0 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc) Bus conditions VScor0 23 Vertical ramp outputLine 274 Line 298 Line 179Line 155VScor31 23 Y IN : Horizontal /vertical sync signal PAL Monitor the pin 23 vertical ramp output and measure the voltage at the line 36, line 60, line 155, line 179, line 274 and line 298 with VSC = 11111. Assign the respective measured values to Va, Vb, Vc, Vd, Ve and Vf. Calculate as follows : VScor31 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc) VSC : 11111 Vertical ramp outputLine 274 Line 298 Continued on next page. No.0069-27/39 LA76832N Continued from preceding page. Test Parameter Symbol point [High-voltage dependent horizontal size compensation] Horizontal size compensation @0 Hsizecomp 22 Y IN : Horizontal /vertical sync signal [Pincushion distortion compensation] East/West parabolic amplitude @32 East/West parabolic amplitude @0 East/West parabolic amplitude @63 [Trapezoidal distortion compensation] East/West parabolic tilt @32 EWtilt32 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 310 (Vb). Calculate as follows : EWtilt32 = Va-Vb EWamp63 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 167 (Vb). Calculate as follows : EWamp63 = Vb-Va EWAMP : 111111 EWamp0 22 Y IN : Horizontal /vertical sync signal EWamp32 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 167 (Vb). Calculate as follows : EWamp32 = Vb-Va Monitor the West/East output of pin 22 and measure the voltage (Va) at line 167. Apply 4.0V to pin 13 and measure again the voltage (Vb) at line 167. Calculate as follows : Hsizecomp = Va-Vb HCOMP : 000 Input signal Test method Bus conditions Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 167 (Vb). Calculate as follows : EWamp32 = Vb-Va EWAMP : 000000 Continued on next page. No.0069-28/39 LA76832N Continued from preceding page. Test Parameter Symbol point East/West parabolic tilt @0 East/West parabolic tilt @63 [Corner distortion compensation] East/West parabolic corner TOP East/West parabolic corner BOTTOM EWcorbot 22 Y IN : Horizontal /vertical sync signal EWcortop 22 Y IN : Horizontal /vertical sync signal Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 under conditions of CORTOP : 1111 (Va) and CORTOP : 0000 (Vb). Calculate as follows : Ewcortop = Va-Vb CORTOP : 1111-0000 EWtilt63 22 Y IN : Horizontal /vertical sync signal EWtilt0 22 Input signal Y IN : Horizontal /vertical sync signal Test method Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 310 (Vb). Calculate as follows : EWtilt32 = Va-Vb Bus conditions EWTILT : 000000 Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 24 (Va) and line 310 (Vb). Calculate as follows : EWtilt32 = Va-Vb EWTILT : 111111 Monitor the East/West output (parabolic wave output) of pin 22 and measure the voltage at line 310 under conditions of CORBOT : 1111 (Va) and CORBOT : 0000 (Vb). Calculate as follows : Ewcorbot = Va-Vb CORBOTTOM : 1111-0000 No.0069-29/39 LA76832N LA76832N Pin Assignment PIN FUNCTION PIN FUNCTION 1 Audio Output 54 SIF Input 2 3 4 FM Output PIF AGC RF AGC Output 53 52 51 SIF APC Filter SIF Output Ext. Audio Input 5 PIF Input1 50 APC Filter 6 7 PIF Input2 IF Ground 49 48 VCO Coil 1 VCO Coil 2 8 IF VCC 47 VCO Filter 9 10 11 12 13 14 15 16 17 FM Filter AFT Output Bus Data Bus Clock ABL Red Input Green Input Blue Input Fast Blanking Input 46 45 44 43 42 41 40 39 38 Video Output Black Level Detector Internal Video Input (S-C IN) Video/Vertical VCC External Video Input (Y IN) Video/Vertical/BUS Ground Selected Video Output Chroma APC1 Filter 4.43MHz Crystal 18 RGB VCC 37 Clamp Filter 19 20 Red Output Green Output 36 35 Chroma APC2 Filter Fsc or Csync Output XRAY 21 Blue Output 34 22 E/W Output 33 CCD/Horizontal Ground 23 24 Vertical Output Ramp ALC Filter 32 31 30 29 28 CCD Filter CCD VCC Clock (4MHz) Output VCO IREF Flyback Pulse Input 25 Horizontal/BUS VCC 26 27 Horizontal AFC Filter Horizontal Output No.0069-30/39 LA76832N LA76832N BUS Control Register Bit Allocation Map 00000000 IC Address (WRITE) : 10111010 LSB Sub Address MSB DATA BITS DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7 ON/OFF AFC gain & gate H.FREQ 1 0 1 1 1 1 1 1 00001 Vreset Timing Audio. Mute Video. MuteH. PAHSE 0 0 0 1 0 0 0 0 00010 Sync. Kill V. SIZE 0 1 0 0 0 0 0 0 00011 VSEPUP V. KILL V. POSI 0 0 1 0 0 0 0 0 00100 H BLK L V. LIN 1 0 0 1 0 0 0 0 00101 H BLK R V. SC 1 0 0 0 1 0 1 1 00110 V. TEST V. COMP COUNT. DOWN. MODE 0 0 1 1 1 0 0 0 00111 R. BIAS 0 0 0 0 0 0 0 0 01000 G. BIAS 0 0 0 0 0 0 0 0 01001 B. BIAS 0 0 0 0 0 0 0 0 01010 * R. DRIVE (0) 1 1 1 1 1 1 1 01011 Drive. Test Half tone Half tone DefG. DRIVE 0 0 1 1 1 0 0 0 01100 * B. DRIVE (0) 1 1 1 1 1 1 1 01101 Blank. Def Sub. Bias 0 1 0 0 0 0 0 0 01110 IF Test1 Bright 0 1 0 0 0 0 0 0 01111 IF Test2 Contrast 0 1 0 0 0 0 0 0 (Bits are transmitted in this order.) Continued on next page. No.0069-31/39 LA76832N Continued from preceding page. Sub Address MSB DATA BITS 00010000 LSB DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7 OSD Cnt. Test OSD Contrast 0 1 0 0 0 0 0 0 10001 Blk. Str. Def Coring Sharpness 1 1 0 0 0 0 0 0 10010 Tint. Test Tint 0 1 0 0 0 0 0 0 10011 Color. Test Color 0 1 0 0 0 0 0 0 10100 Video SW Trap Test Filter. Sys 0 1 0 0 0 0 1 0 10101 Gray Mode Cross B/W * G-Y Angle Color killer ope. 0 0 0 (0) (0) 0 0 0 10110 VBLK SW FBPBLK. Fsc or CsyncWPL Pre-shoot adj. Coring Gain 0 1 0 0 0 0 0 0 10111 Y Gamma Start DC. Rest Blk. Str. start Blk. Str. Gain 0 0 0 0 0 0 0 0 11000 Auto. Flesh C. Ext C. Bypass C_Kill ON C_Kill OFF Color. Sys 0 0 1 0 0 0 0 0 11001 Cont. Test Digital OSD Brt. Abl. DefMid. Stp. DefRGB Temp Bright. Abl. Threshold 0 0 0 0 0 1 0 0 11010 R-Y/B-Y Gain Balance R-Y/B-Y Angle 1 0 0 0 1 0 0 0 11011 B-Y DC Level (White-Balance) R-Y DC Level(White-Balance) 1 0 0 0 1 0 0 0 11100 Audio SW Volume 0 0 0 0 0 0 0 0 11101 IF Test VOL. FIL RF. AGC 0 0 1 0 0 0 0 0 11110 FM. Mute deem. TC VIF. Sys. SW SIF. Sys. SW FM. Gain IF. AGC 0 1 1 0 0 0 1 0 11111 VIDEO. LEVEL FM. LEVEL 1 0 0 1 0 0 0 0 (Bits are transmitted in this order.) No.0069-32/39 LA76832N LA76832N BUS:Control Register Truth Table Register Name ON/OFF (T. Disable) AFC gain & gate 0 HEX OFF (Tset Enable) Auto (Gain) Auto (Gate) V Reset Timing Audio. Mute Video. Mute Sync. Kill Normal Active Active Sync active 1 HEX ON (Test Disable) Gain : Fast Non-Gate 1/4H Shift Mute Mute Sync killed 2 HEX Cross Vrt Size +30ns Max Max 128% 3 HEX Vsepup normal Vsepup V. KILL Gray Mode Cross B/W Vertical Test Half Tone Def Drive. Test Blank. Def OSD Cnt. Test Blk. Str. Def Coring Tint. Test Color. Test Video. SW G-Y Angle VBLK SW Fsc or Csync FBPBLK. SW WPL Pre-shoot adj. Coring Gain Y Gamma Start DC Rest. Blk. Str. start Blk. Str. Gain Auto Flesh C. Ext C. Bypass C_Kill ON C_Kill OFF Cont. Test Digital OSD Brt. ABL. Def Mid. Stp. Def Audio. SW VOL. FIL FM. Mute de-em TC. VIF. Sys. SW SIF. Sys. SW FM Gain IF. AGC Vrt active Normal Normal Normal Half Tone on Normal Blanking Normal Blk Str On Core Off Normal Normal Internal Mode 240deg 24H to 262H (NTSC) 25H to 309H (PAL) 35pin : Fsc out FBP not or WPL OFF Normal Min Y Gamma off 100% Low Min OFF Internal Mode Bypass OFF Auto Mode Auto Mode Normal Analogue Brt ABL On Mid Stp On Internal Mode Normal Active Vrt killed Gray OSD Black Vrt S Corr Half Tone off Test Mode No Blank Test Mode Blk Str Off Core On Test Mode Test Mode External Mode 253deg 29H to 256H (NTSC) 30H to 304H (PAL) 35pin : Csync out FBP or WPL ON +10ns -> Min 106% -> -> ON External Mode Bypass ON Killer ON Killer OFF Test Mode Digital Brt ABL Off Mid Stp Off External Mode Filte OFF Mute White Vrt Lin +20ns -> -> 113% High Max 50µs 75µs 38.0MHz 4.5MHz 50kHz dev. AGC active 38.9MHz 45.75MHz 39.5MHz 5.5MHz 6.0MHz 6.5MHz 25kHz dev AGC defeat No.0069-33/39 LA76832N LA76832N BUS : Control Register Truth Table COUNT DOWN MODE 0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX 50Hz/60Hz MODE Auto 50Hz 60Hz Auto Auto 50Hz 60Hz Auto Standard/Non-Standard MODE Auto Auto Auto Auto Non-Standard Non-Standard Non-Standard Non-Standard Color System 0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX Auto Mode1 PAL/NTSC/4.43NTSC (/SECAM) Auto Mode2 PAL-M/PAL-N/NTSC PAL PAL-M PAL-N NTSC 4.43NTSC SECAM Filter System 0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX 8-15HEX Y Filter 3.58MHz Trap 3.58MHz Trap 4.43MHz Trap 4.43MHz Trap 6.0MHz Trap 6.0MHz Trap 6.0MHz Trap 6.0MHz Trap 4.286MHz Trap Chroma Filter Peaked 3.58MHz BPFSymmetrical 3.58MHz BPFPeaked 4.43MHz BPFSymmetrical 4.43MHz BPFPeaked 3.58MHz BPFSymmetrical 3.58MHz BPFPeaked 4.43MHz BPFSymmetrical 4.43MHz BPFSymmetrical 4.43MHz BPF LA76832N BUS : Status Byte Truth Table Register 0 HEX 1 HEX Detected (Detected) Sync Detected RF. AGC. OUT = ”H” Unlock V. Triger Detected 60 Standard Horiz Locked KILLER ON XRAY Undetected (POR) (Undetected) IF. IDENT RF. AGC IF. LOCK V. TRI Sync Undetected RF. AGC. OUT = ”L” Lock V. Triger Undetected 50/60 50 ST/NONST Non-Standard H. LOCK KILLER Horiz Unlocked KILLER OFF Color System 0 HEX 1 HEX 2 HEX 3 HEX 4 HEX 5 HEX 6 HEX 7 HEX B/W PAL PAL-M PAL-N NTSC 4.43NTSC SECAM Do not care No.0069-34/39 LA76832N LA76832N BUS Initial Conditions Register Register ON/OFF (T. Disable) AFC gain & gate H. FREQ V Reset Timing Audio. Mute Video. Mute H. PHASE Sync. Kill V. SIZE VSEPUP V. KILL V. POSI V. LIN V. SC H BLK L H BLK R V. TEST V. COMP COUNT. DOWN. MODE R. BIAS G. BIAS B. BIAS R. DRIVE Drive Test Half Tone Half Tone Def G. DRIVE B. DRIVE Blank. Def Sub. Bias Bright Contrast East/West DC East/West Amp East/West Tilt East/West Corner TOP East/West Corner Bottom East/West Test H. Size. Comp RGB Temp SW IF Test IF Test1 IF Test2 IF Test3 1 HEX 0 HEX 3F HEX 0 HEX 0 HEX 0 HEX 10 HEX 0 HEX 40 HEX 0 HEX 0 HEX 20 HEX 10 HEX 0B HEX 4 HEX 4 HEX 0 HEX 7 HEX 0 HEX 00 HEX 00 HEX 00 HEX 7F HEX 0 HEX 1 HEX 1 HEX 8 HEX 7F HEX 0 HEX 40 HEX 40 HEX 40 HEX 20 HEX 20 HEX 20 HEX 0 HEX 0 HEX 0 HEX 7 HEX 0 HEX 0 HEX 0 HEX 0 HEX 48 HEX OSD Cnt. Test OSD Contrast Blk. Str. Def Coring Sharpness Tint. Test Tint Color. Test Color Video. SW Trap. Test Filter. Sys Gray Mode Cross B/W G-Y Angle Color Killer Ope. VBLK SW FBPBLK. SW Fsc or Csync WPL Pre-shoot Adj. Coring Gain Y Gamma DC. Rest. Blk. Str. start Blk. Str. Gain Auto Flesh C. Ext C. Bypass C_Kill ON C_Kill OFF Color System Cont. Test Digitsl OSD Brt. Abl. Def Mid. Stp. Def Bright. Abl. Threshold R-Y/B-Y Gain Balance R-Y/B-Y Angle B-Y DC Level R-Y DC Level Audio. SW Volume VOL. FIL RF. AGC FM. Mute deem. TC VIF. Sys. SW SIF. Sys. SW FM. Gain IF. AGC VIDEO. LEVEL FM. LEVEL 0 HEX 0 HEX 1 HEX 1 HEX 00 HEX 0 HEX 40 HEX 0 HEX 40 HEX 0 HEX 4 HEX 2 HEX 0 HEX 0 HEX 0 HEX 4 HEX 0 HEX 1 HEX 0 HEX 1 HEX 0 HEX 3 HEX 0 HEX 2 HEX 1 HEX 1 HEX 0 HEX 0 HEX 1 HEX 0 HEX 0 HEX 0 HEX 0 HEX 0 HEX 0 HEX 0 HEX 4 HEX 8 HEX 8 HEX 8 HEX 8 HEX 0 HEX 00 HEX 0 HEX 20 HEX 0HEX 1HEX 2 HEX 0 HEX 1 HEX 0 HEX 4 HEX 10 HEX No.0069-35/39 LA76832N LA76832N Bus Control Register Descriptions Register Name ON/OFF (T Disable) AFC Gain & gate H Freq. V Reset Timing Audio Mute Video Mute H PHASE Sync Kill Vertical Size Vsep. up Vertical Kill V POSI (Vertical DC) H BLK L H BLK R V LIN (Vertical Linearity) Vertical S-Correction Vertical Test Vertical Size Compensation Count Down Mode Red Bias Green Bias Blue Bias Red Drive Drive Test Half Tone Half Tone Defeat Green Drive Blue Drive Blank Def Sub Bias Brightness Control Contrast Control OSD Contrast Test OSD Contrast Control Blk Str Def Coring Enable Sharpness Control Tint Test Tint Control Color Test Color Control Video SW Trap. Test Filter System Gray Mode Cross B/W G-Y Angle Select Color Killer Operational Point Select Vertical Blanking SW FBPBLK. SW Fsc or Csync Output White Peak Limitter SW Pre-shoot Adjustmant Coring Gain Select Bits 1 1 6 1 1 1 5 1 7 1 1 6 3 3 5 5 2 3 1 8 8 8 7 1 2 1 4 7 1 7 7 7 1 2 1 1 6 1 7 1 7 1 3 3 1 2 1 3 1 1 1 1 2 2 General Description Enable the horizontal output & Disable the Test SW & enable Audio / Video Select horizontal first loop gain & H-sync gating on/off Align ES Sample horizontal frequency Select Vertical Reset Timing Disable audio outputs Disable video outputs Align sync to flyback phase Force free-run mode Align vertical amplitude Select vertical sync. separation sensitivity Disable vertical output Align vertical DC bias H-Blanking Control (Left side of the screen) H-Blanking Control (Right side of the screen) Align vertical linearity Align vertical S-correction Select vertical DAC test modes Align vertical size compensation Select vertical countdown mode Align Red OUT DC level Align Green OUT DC level Align Blue OUT DC level Align Red OUT AC level Enable Drive control DAC test modes Adjust half tone level Half tone defeat SW Align Green OUT AC level Align Blue OUT AC level Disable RGB output blanking Align common RGB DC level Customer brightness control Customer contrast control Enable OSD Contrast DAC test mode Align OSD AC level Disable Black stretch Enable luminance coring Customer sharpness control Enable tint DAC test mode Customer tint control Enable color DAC test mode Customer color control Select Video source Trap Test Select Y/C Filter mode OSD Gray Tone Enable Service Test Mode (normal/Black/White/Cross) Select G-Y Angle Select Color Killer Operational Point Select VBLK Period Enable RGB Blanking or FBP Select 35pin Output (0 : Fsc 1 : Csync) Enable WPL Select Pre-shoot Width Select Coring Gain Continued on next page. No.0069-36/39 LA76832N Continued from preceding page. Register Name Y Gamma Start DC Restoration Select Blk. Str. Start Point Select Blk. Str. Gain Select Bits 2 2 2 2 General Description Select Y Gamma Start Point Select Luma DC Restoration Select Black stretch Start Point Select Black stretch Gain AutoFlesh 1 Enable AutoFlesh function C Ext C Bypass C Kill On C Kill Off Color System Cont Test Bright ABL Defeat Bright Mid Stop Defeat Bright ABL Threshold Digital OSD SW R-Y/B-Y Balance R-Y/B-Y Angle B-Y DC Level R-Y DC Level Audio SW Volume Control Volume Filter Defeat RF AGC Delay FM Mute de-em TC. VIF System SW SIF System SW FM Gain IF AGC Defeat Video Level FM Level East/West DC East/West Amp East/West Tilt East/West Corner TOP East/West Corner Bottom East/West Test H. Size. Comp RGB TEST IF TEST IF TEST1 IF TEST2 IF TEST3 1 1 1 1 3 1 1 1 3 1 4 4 4 4 1 7 1 6 1 1 2 2 1 1 3 5 6 6 6 4 4 3 3 1 1 1 1 8 Selected-C In SW on Select Chroma BPF bypass C Kill Mode (1 : Enable Killer circuit) Disable Killer circuit Select Color System Enable contrast DAC test mode Disable brightness ABL Disable brightness mid stop Align brightness ABL threshold Select Digital/Analogue OSD R-Y/B-Y Gain Balance R-Y/B-Y Angle B-Y DC Level (White-Balance) R-Y DC Level (White-Balance) Select Audio source Customer volume control Disable volume DAC filter Align RF AGC threshold Disable FM outputs Select de-emphasis Time Constant Select 38.0/38.9/39.5/45.75 Select 4.5/5.5/6.0/6.5 Select FM Output Level Disable IF and RF AGC Align IF video level Align WBA output level Align East/West DC Align East/West amplitude Align East/West tilt Align bottom corner correction Align top corner correction Select East/West DAC test modes Align horizontal size compensation Select test modes Select test modes Select test modes Select test modes Select test modes No.0069-37/39 LA76832N Description of Read Status X-RAY X-ray detection circuit is activated with thyristor by means of the threshold voltage from Gnd to 1Vbe. Simultaneously with activation of thyristor, the H drive pulse is stopped and the thyristor output is sent to BUS. BUS Read enables reading of the real-time state of thyristor. To cancel thyristor operation, it is necessary to lower VCC once. 1HEX : Detected POR The POR detection circuit cannot be used in LA76832 and should be ignored. The circuit is operating and performs detection with HVCC = <3.6V. At the same time, the memory for Bus Read is set. (Memory is set at power ON.) To reset the memory, it is necessary to set the ON/OFF control bit to zero once. Since the BUS Read Status and ACK are not returned simultaneously with detection, BUS cannot be read at detection. Failure of ACK return may be useful at detection. For example, the BUS communication start may be timed with ACK at power ON.RF. AGC IF. LOCK V. TRI ST/NONST 0 : RFAGC OUT = \"L\For details, refer to the Application Note. Ignore because this does not function fully at present. Returns the output of V trigger detection circuit in VCD. The internal memory status is renewed at every A. 1HEX : Detected Returns the output of V trigger detection circuit output in VCD standard (262.5 H) and NON standard. Returns in real time the FF output whose mode is determined in VCD. 1HEX : Standard For details, contact us after referring to the Application Note. H. Lock KILLER Detects the phase of FBP and Hsync, integrates the output, and detects in about 40H after HVCO LOCK. 1Hex : Locked Returns the color killer condition. However, the time constant is long, so that about 1V cycle (16 ms) is necessary for detection. Pay attention to the wait for change in the device status. Returns the real-time status for BUS Read. 1HEX : Killer ON Color sys Returns the color system status. Refer to the color system table in the register truth table. The read status is the same as for BUS Write. Package Dimensions unit : mm 3273 No.0069-38/39 LA76832N SpecificationsofanyandallSANYOSemiconductorproductsdescribedorcontainedhereinstipulatetheperformance,characteristics,andfunctionsofthedescribedproductsintheindependentstate,andarenotguaranteesoftheperformance,characteristics,andfunctionsofthedescribedproductsasmountedinthecustomer'sproductsorequipment.Toverifysymptomsandstatesthatcannotbeevaluatedinanindependentdevice,thecustomershouldalwaysevaluateandtestdevicesmountedinthecustomer'sproductsorequipment.SANYOSemiconductorCo.,Ltd.strivestosupplyhigh-qualityhigh-reliabilityproducts.However,anyandallsemiconductorproductsfailwithsomeprobability.Itispossiblethattheseprobabilisticfailurescouldgiverisetoaccidentsoreventsthatcouldendangerhumanlives,thatcouldgiverisetosmokeorfire,orthatcouldcausedamagetootherproperty.Whendesigningequipment,adoptsafetymeasuressothatthesekindsofaccidentsoreventscannotoccur.Suchmeasuresincludebutarenotlimitedtoprotectivecircuitsanderrorpreventioncircuitsforsafedesign,redundantdesign,andstructuraldesign.IntheeventthatanyorallSANYOSemiconductorproducts(includingtechnicaldata,services)describedorcontainedhereinarecontrolledunderanyofapplicablelocalexportcontrollawsandregulations,suchproductsmustnotbeexportedwithoutobtainingtheexportlicensefromtheauthoritiesconcernedinaccordancewiththeabovelaw.Nopartofthispublicationmaybereproducedortransmittedinanyformorbyanymeans,electronicormechanical,includingphotocopyingandrecording,oranyinformationstorageorretrievalsystem,orotherwise,withoutthepriorwrittenpermissionofSANYOSemiconductorCo.,Ltd.Anyandallinformationdescribedorcontainedhereinaresubjecttochangewithoutnoticeduetoproduct/technologyimprovement,etc.Whendesigningequipment,refertothe\"DeliverySpecification\"fortheSANYOSemiconductorproductthatyouintendtouse.Information(includingcircuitdiagramsandcircuitparameters)hereinisforexampleonly;itisnotguaranteedforvolumeproduction.SANYOSemiconductorbelievesinformationhereinisaccurateandreliable,butnoguaranteesaremadeorimpliedregardingitsuseoranyinfringementsofintellectualpropertyrightsorotherrightsofthirdparties.This catalog provides information as of October, 2005. Specifications and information herein are subjectto change without notice. PSNo.0069-39/39